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Many companies have described their experiences with using Motorola G4 processors to provide the VSIPL CoreLite standard for military and medical computing, and others have described their efforts with highly optimized Core and Core+ profiles. This poster paper uses the experience of MPI Software Technology's existing Core+ optimized VSIPL implementation for G4 as the springboard for supporting other platforms of emerging interest to COTS, defense, medical, and imaging customers. Three kinds of technologies are occurring in military computing that may unseat the preeminence of low-power, G4-style RISC processors: (1) the growing power of DSPs, including better development environments, as typified by TI TMS320C6x family (as opposed to SHARC 2106x, which was harder to program strictly from C and libraries); (2) the use of medium-power systems with Pentium 4-based blades; and (3) the growing perception that PowerPC is lagging Pentium in overall performance. Furthermore, the clock speed of the Intel Pentium line of processors is now reaching three or more GHz. Also, the vector processing registers (SSE) available on the Pentium III or later provide several orders of improved performance for single precision floating point operations. Additionally, the well-known Pentium family provides a cost-effective COTS solution for embedded hardware designers as well as the end users. This means that although they have high power consumption, their Flops/Watt are becoming more attractive. MPI now has a fully optimized VSIPL (Core and CoreLite) library, known as VSI/Pro, for a Pentium 4/SSE platform targeting Linux, Windows, and VxWorks operating systems. The FFT performance of VSI/Pro is consistently better than Intel's Math Kernel Library (MKL). VSI/Pro has a carefully designed API, i.e., VSIPL, which is well fitted to the needs of the signal and image processing community in the defense and medical industries. Twenty briefing charts summarize the presentation.

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